A POE network switch design scheme based on MAX5980 chip
Through the system design and testing of the scheme, the feasibility of combining the POE chip with the actual application of the network switch is demonstrated. The scheme is complete in design, stable in operation, and can fully meet the normal operation of various power receiving devices in the back-end network.
I. Introduction
POE (Power Over Ethernet) refers to that without any changes under the existing Ethernet Cat.5 cabling infrastructure, it is used for some IP-based terminal equipment (such as IP telephones, wireless LAN access points). AP, network camera, etc.) while transmitting data signals, it can also provide DC power supply technology for such devices themselves. POE equipment includes power output equipment PSE and power receiving equipment PD. This article focuses on the power output equipment PSE.
Using POE technology, users no longer need to provide wall power for each terminal device connected to POE, thus saving the need for connecting IP phones, wireless LAN access points, video surveillance cameras, building management systems, and remote video kiosks. Power wiring cost.
In addition, with the help of PoE, companies can also lock some key equipment on a power supply and use UPS backup power to support the entire system. As a result, the power supply guarantee of the entire system will be greatly improved, thereby improving the reliability and reliability of the entire system equipment. safety.
2. Standards followed by the system
With the increasing popularity of Ethernet in the world, the corresponding networking equipment has been rapidly developed. In the long-term use, the supporting power supply has been one of the bottlenecks that plagued the further popularization of networking terminal equipment. Therefore, the standard for realizing power supply for Ethernet equipment through Ethernet data line pairs or spare line pairs is naturally promulgated and implemented along with market demand and technological development.
The IEEE802.3af standard provides detailed regulations on Power over Ethernet (POE) and related implementation rules. This standard, as a power transmission protocol based on Ethernet, specifies in detail the mechanism for the corresponding power transmission equipment (PSE) to supply power to the power receiving equipment (PD). It includes detailed technical implementation rules for online testing of power receiving equipment, hierarchical processing, starting power supply, and disconnection protection. The agreement also makes detailed provisions on the Ethernet transmission line (PTL).
The system scheme in this article is designed based on the above-mentioned standards. The system guarantees the normal operation of the existing network while ensuring the safety of the existing structured wiring, thereby minimizing the cost.
3. Chip selection and circuit design
Before system design, we compared many international chips that can realize PSE function. American MAX5980 has attracted our attention because of its excellent design, reasonable supporting scheme, and unobstructed control channels. This will play a vital role in our future design.
MAX5980 is a four-channel power transmission equipment (PSE) power controller. The chip is specially designed for use in IEEE 802.3at/af and compatible PSE equipment.
According to the requirements of the standard, the device has the functions of detection, classification, current limiting, and load disconnection detection for the back-end power receiving equipment. The device supports fully automatic operation and software programming control. The device also supports the new two-event classification and Category 5 detection and classification functions for high-power powered devices.
The device supports a single power supply, each port (the fifth type is enabled) can provide up to 70W of power, and can provide high-capacitive reactance detection of the original back-end power receiving equipment.
According to the technical characteristics of MAX5980, we first designed a 4-channel PSE electrical schematic diagram, as shown in Figure 1.
According to the chip data, the input voltage of the PSE controller MAX5980 is designed to be 48V DC. The output part of the chip uses 4 high-power FETs as the current control terminals for the 4 network power supply outputs.
The 48V DC input is provided by the switching power supply. The power is output through the network port and provided to the back-end powered device. The field effect tube is a key element in the control loop of the entire power output. The source of the field effect tube in the loop is connected to a 0.25 ohm sampling resistor, and then returns to the chip.
The output current is sampled by the field effect tube through a sampling resistor to monitor the current of the output loop. The chip can sample through the SENSE port at any time to read the load characteristics of the back-end PD device. After judgment, the chip can control the G pole of the field effect tube to make various control responses.
According to the definition of the 802.3at protocol and the functional design of the chip, the chip will judge according to different sampled data, and then perform actions such as detection, classification, port voltage activation, overcurrent protection, undervoltage and overvoltage protection. So as to realize the operation of the whole chip system.
In the debugging process, two 0.1uf capacitors are connected in parallel at the 48V input terminal to suppress the ripple coefficient of the power supply, enhance the anti-interference ability, and improve the reliability of the power supply. At the same time, SMIB58 transient suppression tube is also selected at the 48V terminal to prevent the impact of high current and avoid damage to the device.
The pins 1, 2, and 3 of MAX5980 are the interface lines of the external serial bus. The I2C serial bus is not used in this article. According to the requirements of the design literature, these 3 lines must be grounded.
Pins 5, 6, 7, and 8 of the chip are used as the position encoding end of the slave address of the device, and they must also be grounded in the design.
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