If you are a beginner of MSP430, I hope that the answers to these questions can help you.
If you are a MSP430 beginner. I hope this can help you, this is a good comprehensive question. If you think this article is useful to you, please help promote it.
1-Q: MSP430 pin multiplexing between JTAG and I/O functions
A. The four pins P1.7 - P1.4 have both I/O and JTAG functions on both the 20 and 28-pin MSP430F1xx devices. The default function of these pins is to have I/O capability when the device is powered up. When the test pins are pulled high, these pins are selected as JTAG. When using an in-circuit debugger, the FETs of these devices place these pins in JTAG mode. For information on issuing pins from JTAG mode when using the debugger, see the FET Tool User Guide.
Note: If an external circuit is attached to a shared pin, the interaction of the JTAG signal with the pin must be considered.
If the device is programmed or debugged in-system interactively via JTAG, consider the effects that the circuit will have. This should be considered if the circuit will increase the load or bias of the shared pin, which in turn interferes with JTAG communication. The higher pin counter has a dedicated JTAG pin that can only be used for debugging and programming.
[When using the MSP430 JTAG pin for other control applications, be aware that this will affect the debugging of the FET.
Causes that the microcontroller program cannot be downloaded or cannot be debugged. When the recommended pin is sufficient for application, avoid using JTAG multiplexing I/O function]
2-Q: Speed ​​of the MSP430 ADC12 module
A: The conversion rate of ADC12 is a function of the ADC12CLK and clock required for conversion. The approximate minimum and maximum values ​​of ADC12CLK are 500kHz and 6.5MHZ, respectively. The fastest conversion process can be completed in 17 cycles (13 cycles for conversion and 4 cycles for sample and hold). 6.5MHz/17 = 382ksps. The ADC12 can't run at a lower rate than the minimum ADC12CLK, but under software control, the sample gate can remain open without restriction. For more details on the sampling and conversion time specifications, please refer to the data sheet.
3-Q: The drain current and source current of the MSP430 I/O pin
A. The MSP430 does not specify the maximum absolute current from the I/O pins. For a description of Voh and Vol specifications, please refer to the data sheet. It shows that each I/O pin can supply a few milliamps of current, but the output voltage will change as the current increases. The notes to these specifications usually provide the maximum total current that is required to maintain a particular voltage and the output of all combinations. The MSP430 I/O is not suitable for driving high current 20mA LEDs.
4-Q: MSP430 SPI or UART speed
A: In SPI master mode, the communication rate can reach 4Mbps, while in UART mode, the rate can reach 2Mbps. The USART is configurable to support both synchronous (SPI) and asynchronous (UART) operation and can be selected from several internal and external clock sources (independent of the CPU clock). In SPI Master mode, the USART can run at 1/2 of the application clock. For example, if an 8MHz clock is used, the SPI master mode can achieve a transfer rate of 4Mbps. In UART mode, reliable communication requires at least 3 or 4 clocks per bit. For example, dividing the 8MHz clock by 4 can support rates up to 2Mbps. A full description of the USART features is available in the MSP430xxxx User Guide at http://www.TI.com/MSP430.
5-Q: Minimum input pulse width required for MSP430 interrupt
A: The minimum interrupt pulse width must be greater than 1.5 main clock cycles (MCLK) to ensure that the interrupt is valid. See the device-specific data sheet for questions.
6-Q: Getting Started with MSP430
A: For complete information on the MSP430 product line, visit the MSP430 home page at http://www.TI.com/MSP430. in
On the MSP430 home page, links to all documents, application reports, downloadable code samples, and developer information are provided. Each MSP430 device has an associated data sheet that contains the electrical parameters of a particular device and a list of peripheral modules that are integrated into a particular device. In addition, each device family (MSP430x1xx, MSP430x3xx, MSP430x4xx) has an associated user guide that provides detailed information on CPU, programming, and peripheral operations. All MSP430 devices have the same CPU and instruction set without exceptions. The device independent peripheral modules (timer, UART, A/D) are strictly memory mapped. The MSP430 Flash Simulation Tool (FET) is a comprehensive, low-cost, easy-to-use tool that is familiar with the MSP430. The FET contains many validated sample programs and provides the sample of the device and all the hardware and software needed to complete a project.
7-Q: MSP430: Hardware USART Configuration for MSP430
A. The hardware USART module in the MSP430 is a state machine that must be reset each time a new USART configuration is defined. This can be done in firmware via the setup/reset sequence of the SWRST bit in the UCTL register.
By default, the SWRST bit is set after a Power-on Reset (POR). If the USART module parameters are first defined by the configuration control register after POR, the configuration UCTL register should be placed last in the sequence so that SWRST can be reset to initiate a state mechanism with predetermined settings. This can be done with MOV.B #000X XXX0B, &UCTL in assembly language, and UCTL = 0b000X XXX0 in C. For more details, please refer to the device's user guide and code examples.
If the USART module is reconfigured in firmware, the SWRST bit must be set/reset sequenced after reconfiguration to restart the USART state mechanism with the new configuration.
8-Q: MSP430 Port Pin Interrupt Type
A: Port pin interrupts are edge dependent and can be selected individually. The user can select a rising edge or falling edge interrupt for each pin. Note that interrupt flags can only be automatically cleared on I/O pins with dedicated interrupt vectors, P0.0 and P0.1 are only available for MSP430x3xx devices. On other port pins with interrupt functionality, this flag is not automatically cleared and the user program must explicitly clear the flag. In addition to the individual interrupt enable bits, the Global Interrupt Enable (GIE) bit in the Status Register must be set for any interrupts to be serviced. For additional information, please refer to the chapter on digital I/O in the User Guide.
9-Q: The accuracy of the MSP430 built-in temperature sensor
A: The rated 00C voltage and temperature coefficient with the corresponding tolerance range are provided in the product data sheet. The rated 00C voltage is specified as 986mV with a maximum error of +/- 5%. Therefore, the temperature sensor's 00C voltage can be almost +/- 50mV per device in the harshest environments. This is approximately equal to +/- 14C. Note that this difference is primarily related to individual devices, so a very accurate absolute temperature can be achieved with a full resolution ADC12 as long as a single device is properly calibrated.
10-Q: Differences between MSP430F11x1 and MSP430F11x1A
Answer: MSP430F11x1:
BSL version 1.10 (errata: BSL2 and BSL3) issues a security fuse (Security-Fuse) Not for use (errata: FUSE2) To ensure safe operation, an external pull-down resistor is required at pin Test/Vpp (errata) TEST1)
MSP430F11x1A:
BSL version 1.30 (errata BSL2 and BSL3 have been modified, please refer to "MSP430 Boot Loader Features" (SLAA089A) for details). The Security-Fuse release is used for supply (errata FUSE2 has been modified). Safe operation, no external pull-down resistors are required at pin Test/Vpp (errata TEST1 has been modified)
prompt:
It is a good design practice to connect unused Test/Vpp pins to VSS. If the Test/Vpp signal is connected to the JTAG connector to enable in-circuit debugging and programming, the external pull-down resistor will improve EMI (electromagnetic interference) and ESD (electrostatic discharge) performance.
11-Q: Fast flash programming method during mass production
A: When programming MSP430 flash devices during mass production, the following options are available:
1- Use the programmer (anytime, no development required):
a MSP-PRGS430
b BSL tools (eg tools from Gessler Elektronik, Softbaugh, Elprotronic)
c Group Programmer MSP-GANG430
For third-party tools, please visit
http://www.TI.com/sc/MSP430 》》Third Party》》 Third Party Tools
2- Use the programmer with your own software (requires some development work):
The MSP-PRGS430 and MSP-GANG430 tools are included with the Windows DLL. You can use the features of the DLL and program your MSP430 with your own software. A detailed description of the DLL functions is included in the user guides for SLAU048 and SLAU101 tools, respectively.
3- Complete all work independently:
a JTAG interface:
You can find documentation about the JTAG interface on the web at:
Programming the flash-based MSP430 using the JTAG interface (slaa149)
b BSL interface (RS232):
You can find documentation about the BSL interface online at:
MSP430 boot loader function (slaa089a)
Bootloader application in MSP430 with flash hardware and software Propo (slaa096b)
12-Q: What are the MSP430 JTAG signals required for use with FETs?
A: For more information on how to connect JTAG signals for proper in-system emulation, programming, and debugging, see the latest version of the Flash Simulation Tool (FET) User Guide. The FET User Guide is installed with the FET software and is available on the MSP430 website at www.TI.com/MSP430. The interface box provided with the MSP-FET430Pxxx kit allows the debug software to communicate with devices within the system. The MSP-PRGS430 also uses the same JTAG connection (described in the MSP-PRGS430 manual), which is only available for programming.
13-Q: MSP430: A tool for communicating with the MSP430 boot loader
A: TI does not directly provide specific tools that can communicate with the bootloader. Application Note "Hardware and Software Recommendations for MSP430 Flash Bootloader Applications" SLAA096 includes validated software and circuit examples that can be easily built to connect to the bootloader. The application manual "Features of the MSP430 Bootloader" SLAA089 also contains very useful information. These application reports are available on the MSP430 website. In addition, you can visit the MSP430 website to find third-party companies that offer off-the-shelf bootloader tools or solutions.
14-Q: Using hex 80 in MSP430 Bootloader (BSL) communication
A: Hexadecimal 80 is sent as a sync character before each transfer. The device is acknowledged by hexadecimal 90. Then send the data frame. Each frame begins with a header byte = hex 80. Frames of other bytes follow the hex 80 header. The correct format of the BSL data frame is defined in the "MSP430 Bootloader Features" application note SLAA089 on the MSP430 website.
A careful examination of the code provided with the "Bootloader in MSP430 w/Flash Application - Hardware and Software Recommendations" application note SLAA096 reveals that this is the best technique. The software and hardware in this application note have been tested to prove that they are working properly.
15-Q: Where can I find the BSDL file to build the JTAG chain?
A: All MSP430s have a JTAG interface for program development and flash programming only. However, this JTAG interface is not fully compatible with IEEE 1149.1. For example, any MSP430 does not have a Boundary Scan Cell. We only support the required command BYPASS, but do not support other required commands: EXTEST and SAMPLE/PRELOAD.
in conclusion:
There are no BSDL files for any MSP430 device.
You cannot put the MSP430 in the JTAG chain with other devices
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