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Signal integrity design is becoming more and more important as system clock frequencies and rise times increase. Unfortunately, most digital circuit designers are not aware of the importance of signal integrity issues, or until the final stages of design.

This article describes the effects of signal integrity in general design in high-speed digital hardware circuit design. This includes issues such as characteristic impedance control, termination matching, power and ground planes, signal routing, and crosstalk. Mastering this knowledge allows a digital circuit designer to notice potential signal integrity issues early in the circuit design and to help design to minimize the impact of signal integrity on design performance.

Although signal integrity has long been a must in hardware design experience, it has long been ignored in digital circuit design. In the era of low-speed logic circuit design, since signal integrity related problems rarely occur, the consideration of signal integrity is considered to be a waste of efficiency. However, with the increase in clock rate and rise time in recent years, the necessity and design of signal integrity analysis is also growing. Unfortunately, most designers don't notice it, and still rarely consider signal integrity issues in their designs.

Modern digital circuits can be up to GHz and rise time is within 50ps. At such a rate, the negligence on the PCB design trace is even one foot, and the resulting voltage, delay and interface problems will not only be limited to this line, but will also affect the entire board and Adjacent boards.

This problem is especially serious in hybrid circuits. For example, consider a high performance ADC to digitally receive analog signals in one system. The energy spread across the digital output port of the ADC device can easily reach 130dB (10,000,000,000,000 times) than the analog input port. Any noise on the ADC digital port. Signal integrity in design is not a mysterious process. It is critical to be aware of potential problems early in the design process, while at the same time effectively avoiding the problems that are caused in the later stages. This article discusses some of the key signal integrity challenges and how to deal with them.

Ensure signal integrity:

1, isolation

Components on a PCB have various edge rates and various noise differences. The most straightforward way to improve SI is to achieve physical isolation of components on the PCB based on the edge and sensitivity of the device. The figure below is an example. In the example, power supply, digital I/O ports, and high-speed logic are high-risk circuits for clock and data conversion circuits. The clock and data converter placed in the first layout is adjacent to the noise device. Noise will couple to sensitive circuits and reduce their performance. The second layout made effective circuit isolation would be beneficial to the signal integrity of the system design.

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