Device Controller Basic Functions
Receive and recognize commands
The CPU can send many different commands to the controller, and the device controller should be able to receive and recognize these commands. To this end, there should be a corresponding control register in the controller to store the received commands and parameters, and to decode the received commands. For example, the disk controller can receive 15 different commands such as Read, Write, Format, etc. from the CPU, and some commands also have parameters; correspondingly, there are multiple registers and command decoders in the disk controller.
data exchange
This refers to the realization of data exchange between the CPU and the controller, and between the controller and the device. For the former, through the data bus, the CPU writes data into the controller in parallel, or reads data from the controller in parallel; for the latter, the device inputs data to the controller, or transmits data from the controller to the device . To do this, the data register must be set in the controller.
Identify and report the status of equipment
The controller should note the state of the device for the CPU to know. For example, the CPU can start the controller to read data from the device only when the device is ready to send. To this end, a state register should be set up in the controller, and each bit of it should be used to reflect a certain state of the device. When the content of the register is read in by the CPU, the state of the device can be known.
address recognition
Just as every location in memory has an address, so does every device in the system, and the device controller must be able to identify the address of every device it controls. In addition, in order for the CPU to be able to write (or read) data to (or from) registers, these registers should all have unique addresses. For example, it is stipulated in the IB-MPC machine that the addresses of each register in the hard disk controller are one of 320-32F. The controller should be able to correctly identify these addresses, for this reason, an address decoder should be configured in the controller.
data buffer
error control
The device controller also takes care of error detection on the data transmitted by the I/O device. If it is found that there is an error in the transmission, the error detection code is usually set and reported to the CPU, so the CPU invalidates the data transmitted this time and retransmits it. This ensures the correctness of data entry.
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