Analysis of CS485xx digital audio DSP processing scheme

Cirrus' CS485xx DSP series provides high-performance post-processing and digital audio mixing. The dual clock domain provided on the PCM input allows mixing of audio streams of different sampling frequencies. Low-power standby mode extends battery life, making it suitable for applications such as car audio systems that are frequently turned on but do not require audio processing.

The CS485xx series products include three devices, namely CS48520, CS48540 and CS48560. The difference between the devices is the number of available inputs and outputs. All DSPs support dual-input clock control and dual audio processing paths, and are all packaged in a 48-pin QFP.

Analysis of CS485xx digital audio DSP processing scheme

Figure 1 CS48500 system block diagram

Analysis of CS485xx digital audio DSP processing scheme

Figure 2 CDB48500-USB evaluation board block diagram

Main features of CS485xx series

Low-cost, high-performance 32-bit DSP

-300 000 000 MAC / s (multiplication and accumulation per second)

-Dual MAC cycles per clock

-72-bit accelerator is more accurate in industrial applications

-24k & TImes; 32 SRAM, 2k program block to formulate data or program

-Internal ROM includes multiple configurable sound enhancement instruction sets

-8-channel internal DMA

-Internal watchdog DSP lock prevention

DSP toolbox w / personal key used to protect consumer IP

-Configurable serial audio input / output

-Max 32 bits @ 192kHz

-Support 32-bit audio sampling I / O between DSP chips

-TDM input mode (multiple channels on the same line)

-192kHz SPDIF transmitter

-Multi-channel DSD direct bitstream digital SACD input

Supports two different input Fs sampling rates

-Output can be master mode or slave mode

-Dual processing path capability

-Input support dual domain slave clock

-Hardware-assisted time sampling to deal with changes in sampling rate

Integrated always manager / PLL

-Can be started from external quartz, external oscillator

Input Fs audio detection

Host control and boot through serial interface

Configurable GPIO and external interrupt input

1.8V core and 3.3VI / O can receive 5V input

Low power mode

-Meets the requirements of "Energy Star" in low power mode, standby power consumption is 268μW

Analysis of CS485xx digital audio DSP processing scheme

Figure 3 CDB48500-USB evaluation board connection diagram

CS485xx series target applications

Digital Television

Multimedia peripherals

iPod

Front element

Automotive external amplifier

HD-DVD & Blu-ray Disc DVD Receiver

PC speakers

CDB48500-USB Evaluation Board

Each CDB48500-USB evaluation board includes:

CDB48500 development board

Power supply: + 9V, 1.67A, 100V ~ 240V, with AC power cord

CDB USB main digital I / O card

USB cable

Three-plate superposition is used to determine the output of CS48520, CS48540 and CS48560

CDB48500-USB Evaluation Board Features

PC control of CS485XX using DSP Composer graphical user interface

Serial control of audio devices on CDB48500 via I2C or SPI protocol

PCM digital audio input via optical or coaxial S / PDIF (compressed data input is not supported)

Up to 12 channels of analog audio input via two CS42448 audio codecs

Up to 12 channels of analog audio output via two CS42448 audio codecs

Digital audio output of PCm through optical S / PDIF

Headphone output jack

Multi-channel digital audio input via CDB USB MASTER card (not yet supported)

Separate input and output clock domains can perform 1FS to 2FS audio processing on CS485xx

Fast boot for consumer applications from 4Mbits serial SPI flash devices-Host Controlled Master Boot (HCMB)

Microphone input with integrated amplifier for intelligent room calibration (IRC) evaluation (future)

Support all CS485xx series products in 48-pin LQFP package

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Hangzhou Qiantang River Electric Group Co., Ltd.(QRE) , https://www.qretransformer.com