High-precision three-dimensional imaging sonar system based on FPGA

Abstract: The realization of high-precision three-dimensional imaging sonar needs to complete large-scale signal synchronization acquisition and massive data parallel computing. To this end, a parallel computing system based on field programmable logic gate array is proposed. Under the premise of using the homologous clock, the Spartan-3 is used to synchronously sample the 2304-channel transducer signal of the planar array, down-sample by discrete Fourier transform to reduce the sampling data size, and recalculate the transducer with Virtex-5. Weights to reduce the amount of computation, using a step-by-step beamforming algorithm to reduce the memory size consumed by the system, while real-time display of 3D images on a PC. The experimental results prove the feasibility of the system.

High-precision 3D imaging technology is an important innovation field in the research of underwater acoustic equipment. It has important applications in the fields of seabed exploration, shipwreck salvage and marine research. At present, the key technical difficulties that need to be overcome in the development of high-precision three-dimensional sonar imaging systems are the huge hardware overhead caused by the synchronous acquisition of large-scale transducer data and the parallel computing of massive data [1]. To this end, the literature [2] proposes to use the sparse matrix transducer array to assign weights to transducers with different index numbers in the planar array, and ignore the transducers with weight 0 to reduce the front-end signal acquisition channel and The amount of data calculation at the end. Starting from reducing the size of the parallel operation matrix in the beamforming process, the literature [3] proposes to divide the large array into multiple sub-arrays, and make a certain matching design through the transmitter transmitter and receiver, and use the beam multi-level synthesis method. Forming the final beam can also reduce the amount of computation.

Based on the principle of beamforming algorithm, this paper designs and implements simultaneous sampling of 48&TImes; 48 signals for large-scale two-dimensional transducer signals, and uses high-performance field editable logic gate arrays as the system platform. The optimized simulated annealing algorithm [4] is used to implement 128 & TImes; 128 spatial beamforming for subsea condition imaging.

The beamformer used in 3D acoustic imaging sonars can be thought of as a spatial filter that filters out signals in certain directions of the space and passes only the signals in the specified direction. The system uses the M&TImes;N(M=N=48) plane array to receive the acoustic signals reflected from the underwater objects and perform beamforming operations to form P&TImes; Q beams to determine the beamforming energy values ​​in the open angle range, and then Different energy values ​​are used for stereoscopic drawing to obtain a three-dimensional image.

The system needs to complete the conditioning of the transducer signal, signal acquisition, beamforming operation, and finally upload the calculation result. The system adopts a distributed structure and is divided into a front-end signal conditioning acquisition subsystem and a back-end data processing subsystem. The specific structure is shown in Figure 1.

The front-end signal conditioning acquisition subsystem consists of 48 sub-signal boards, which implements front-end analog signal conditioning sampling and performs preliminary signal processing. There is one Xilinx Spartan-3 on each daughter board, which controls multiple ADs to realize synchronous acquisition of multiple signals and perform multi-point discrete Fourier transform on the sampled data. The transformed data is passed to the signal board on the back end via the LVDS high speed signal interface.

The back-end data processing subsystem, the block signal processing board in Figure 1, consists of four Xilinx Virtex-5s for signal processing high-end, one Spartan-3 (interface FPGA), and one PowerPC embedded processor. constitute. Virtex-5 uses high-speed LVDS signals for data interaction, each obtaining the required data from the other three Virtex-5s to implement the beamforming algorithm, and finally transmitting the calculated results to the interface FPGA. Each piece of Virtex-5 needs to manage 12 signal acquisition daughter boards. In the system configuration phase, the signal acquisition daughter board needs to be configured through IIC, and data from 12 signal acquisition daughter boards needs to be processed during data processing. In order to communicate with the PowerPC processor, the interface FPGA needs to convert the uploaded data into a format. The PowerPC processor peripheral extension has Nor Flash for storing system code, and Nand Flash for storing system-related data such as the number of valid sensors and the corresponding weight coefficients.

The PC master exchanges data with the signal processing board through the Gigabit Ethernet interface and calls OpenGL related functions to realize real-time display of 3D images [5].

In order to achieve synchronous sampling of signals on a large-scale planar array, the signal acquisition daughter board needs to complete the following tasks: signal conditioning of the output signal of the transducer, synchronous acquisition of the entire array of signals, and discrete Fourier transform of the AD signal.

Using Xilinx Spartan-3 as the master chip for the signal acquisition daughter board, it is responsible for the signal acquisition of a linear array of 48 transducers. The entire imaging sonar system uses an acoustic signal of 300 kHz and the system uses a sampling rate of 900 kHz.

As shown in Figure 2, the transducer converts the acoustic signal into a weak electrical signal that filters out the low-frequency ambient noise through a high-pass filter. When the sonar works in active mode, TVG control is a more important module of the pre-receiver, which can prevent the blocking phenomenon of the receiver during the transmitting pulse, and at the same time facilitate the normalization of the reverberation background.

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